I’ve covered the PLA and the question how to replace a broken one before. First, when I repaired one of my C64 from back in the day, needed a quick replacement, and used an EEPROM on a simple adapter board. In a follow-up post I used a simple circuit suggested in a talk by Eslapion to test this PLA replacement for glitches and found plenty. Last but not least, I created a replica of the Super Zaxxon cartridge also to be used for testing the PLA. There is a lot more information online on this topic like the excellent Post on Breadbox64.
A while back I stumbled across another open source DIY solution for replacing the PLA called the DodgyPLA. This variant is almost as easy to build as the EPROM adapter but promises far better compatibility, so I got curious. Like the U17 PLAnkton it is based on the XC9536XL CPLD made by Xilinx. A somewhat unique feature of the DodgyPLA is its single sided layout that is optimized for self-etching.
But since I wasn’t in a hurry and PCB production is so easy and cheap these days I created my own board layout with a more accessible JTAG header and dubbed it the XCPLA. All my modifications are available on Github of course, under the same license as the original DodgyPLA. The BOM for the XCPLA is refreshingly short:
|1||U1||AMS1117 3.3 voltage regulator||eBay (China)|
|2||C1,C2||10uF 0805 ceramic capacitor||eBay (China)|
|1||C3||100nF 0805 ceramic capacitor||eBay (China)|
|1||male pin headers, round||eBay (China)|
When the first PCBs had finally arrived and I had assembled the first unit I discovered that programming the CPLD wasn’t as easy as I had expected. I don’t own a dedicated Xilinx programmer so the plan was to use my (very) early version of the Bus Pirate and OpenOCD instead. But try as I might, I couldn’t get this to work. I was already prepared to wire up a Raspberry Pi instead when I learned about a different approach.
Someone facing the same problem as myself had connected the JTAG header to the FTDI chip on an EasyFlash3 cartridge. Then he used the
easp.exe tool that is normally used to program the CPLD on the EF3 itself. This sounded like a great idea! I tried for myself and it worked like a charm:
easp.exe -p 0x8738 -v dodgypla.svf
Later — still refusing to buy a dedicated Xilinx programmer — I ordered a relatively cheap breakout board with a FT232H chip on eBay. When this adapter finally arrived, I wired it up as a JTAG programmer.
After another short fight with OpenOCD I was finally able to flash the CPLD directly:
bin-x64\openocd.exe -f scripts\interface\ftdi\um232h.cfg -c "adapter_khz 100" -c "jtag newtap XC9536XL tap -irlen 8 -expected-id 0x49602093" -c init -c "svf dodgypla.svf" -c "sleep 200" -c shutdown
With the programming of the CPLD done, the XCPLA is ready to function as a replacement for the PLA on C64 long boards. Next, I wanted to see if it is an improvement over the simple EPROM based solution. So I wired up Eslapion’s PLA glitch detector circuit again, on a piece of perf board instead of the breadboard this time.
As expected, I could easily detect the glitches on the /ROML and /ROMH lines caused by the EPROM PLA and I was happy to find that I would see none of those when using the XCPLA!
Finally, I prepared another simple test for the PLA. In his comment on my post about the Super Zaxxon replica, Eslapion suggested that I replace the 74LS74 flip-flop on the cartridge with a 74HC74 to make it more susceptible to glitches caused by the PLA. And indeed, with the HC logic chip installed on the cartridge and the EPROM PLA on the mainboard, the graphic errors in the game are immediately visible. With the XCPLA on the other hand, Super Zaxxons plays perfectly even with the HC logic chip on the cartridge.
In Summary: The DodgyPLA and its variant the XCPLA are low-cost, fairly easy-to-build replacements for the PLA that provide far better qualtiy than the EPROM based solutions.
While the XCPLA worked perfectly for me so far, my own testing equipment and range of different C64 boards are quite limited. So I wasn’t surprised to hear from time to time of others who had been having issues with the XCPLA on their boards. Recently, it was brought to my attention in the comments below and on Twitter (Thank you Dan!) that there is another project descended from the DodgyPLA which is using modified delays on the output lines that seem to help resolve those issues in some cases.
I have now included compiled versions of both the original DodgyPLA and the neatPLA core in my repository on Github. If the original version doesn’t work for you, you might want to give the other one a shot. And I’d love to hear from you in the comments whether this helped or not.